Duck! Another blag incoming!

Sparcv9 for Valgrind


I am sitting the valgrind devroom. Because I kinda heard everything in the python room. Talk by Evil Corp about sparcv9 in valgrind.

What is sparc?

  • Developed since 1980
  • Sun -> Oracle
  • Big computers
  • Several terabytes of memory
  • Several thousands of CPUs


  • RISC
  • Load/store access, properly aligned
  • Explicit stack support (nothing like push/pop)
  • Instruction format OP %r1, %r2/imm, %rd
  • Hypervisor in the firmware
  • General purpose registers and aliasing
  • Two programm counters


Uses register windows, which overlap. It rotates on save and restore. The out registers overlap. So output becomes input. The CPU will request spill/fill requests to the system if all registers are used up.

Delayed control transfer

  • Control tranfer instruction (jmp, branch) have a delay slot

Address Space Identifiers

Ok... here they lost me. I think sparc is quite cool, but if you come from x86 total crazy platform.


Ok, still lost, sorry. Here a picture showing the general Valgrind architecture.


Afterwards the valgrind wizards asked questions, so I was still lost. (:

This entry was tagged as valgrind fosdem