I am sitting the valgrind devroom. Because I kinda heard everything in the python room. Talk by Evil Corp about sparcv9 in valgrind.
Uses register windows, which overlap. It rotates on save and restore. The out registers overlap. So output becomes input. The CPU will request spill/fill requests to the system if all registers are used up.
Delayed control transfer
- Control tranfer instruction (jmp, branch) have a delay slot
Address Space Identifiers
Ok... here they lost me. I think sparc is quite cool, but if you come from x86 total crazy platform.
Ok, still lost, sorry. Here a picture showing the general Valgrind architecture.
Afterwards the valgrind wizards asked questions, so I was still lost. (: